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sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 1 features ? access times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns ? battery backup: 2v data retention ? low power standby ? high-performance, low-power cmos double-metal process ? single +5v ( +10%) power supply ? easy memory expansion with ce\ ? all inputs and outputs are ttl compatible options marking ? timing 12ns access 1 -12 15ns access 1 -15 20ns access -20 25ns access -25 35ns access -35 45ns access -45 55ns access 2 -55 70ns access 2 -70 100ns access -100 4 ? package(s) 3 ceramic dip (300 mil) c no. 108 ceramic dip (600 mil) cw no. 110 ceramic lcc (28 leads) ec no. 204 ceramic lcc (32 leads) ecw no. 208 ceramic flat pack f no. 302 ceramic soj ecj no. 500 ? operating temperature ranges military -55 o c to +125 o cxt industrial -40 o c to +85 o cit ? 2v data retention/low power l notes: 1. -12 and -15 available in it only. 2. electrical characteristics identical to those provided for the 45ns access devices. 3. plastic soj (dj package) is available on the as5c2568 datasheet. 4. available in cw, ecw, and f packages only. pin assignment (top view) available as military specifications ?smd 5962-88662 ?mil-std-883 28-pin soj (ecj) 28-pin dip (c, cw) 32-pin lcc (ecw) 28-pin flat pack (f) 28-pin lcc (ec) general description the austin semiconductor sram family employs high-speed, low power cmos designs using a four-transistor memory cell. these srams are fabricated using double-layer metal, double-layer polysilicon technology. for flexibility in high-speed memory applications, aus- tin semiconductor offers chip enable (ce\) and output enable (oe\) capability. these enhancements can place the outputs in high-z for additional flexibility in system design. writing to these devices is accomplished when write enable (we\) and ce\ inputs are both low. reading is accom- plished when we\ remains high and ce\ and oe\ go low. the device offers a reduced power standby mode when dis- abled. this allows system designs to achieve low standby power requirements. the l version provides a battery backup/low volt- age data retention mode, offering 2mw maximum power dissi- pation at 2 volts. all devices operate from a single +5v power supply and all inputs and outputs are fully ttl compatible. 4 3 2 1 32 31 30 a7 a12 a14 nc v cc we\ a13 14 15 16 17 18 19 20 dq2 dq3 v ss nc dq4 dq5 dq6 5 6 7 8 9 10 11 12 13 a6 a5 a4 a3 a2 a1 a0 nc dq1 29 28 27 26 25 24 23 22 21 a8 a9 a11 nc oe\ a10 ce\ dq8 dq7 3 2 1 28 27 a7 a12 a14 v cc we\ 13 14 15 16 17 dq3 v ss dq4 dq5 dq6 4 5 6 7 8 9 10 11 12 a6 a5 a4 a3 a2 a1 a0 dq1 dq2 26 25 24 23 22 21 20 19 18 a13 a8 a9 a11 oe\ a10 ce\ dq8 dq7 a14 1 28 v cc a12 2 27 we\ a7 3 26 a13 a6 4 25 a8 a5 5 24 a9 a4 6 23 a11 a3 7 22 oe\ a2 8 21 a10 a1 9 20 ce\ a0 10 19 dq8 dq1 11 18 dq7 dq2 12 17 dq6 dq3 13 16 dq5 v ss 14 15 dq4 32k x 8 sram sram memory array for more products and information please visit our web site at www.austinsemiconductor.com a14 1 28 v cc a12 2 27 we\ a7 3 26 a13 a6 4 25 a8 a5 5 24 a9 a4 6 23 a11 a3 7 22 oe\ a2 8 21 a10 a1 9 20 ce\ a0 10 19 dq8 dq1 11 18 dq7 dq2 12 17 dq6 dq3 13 16 dq5 v ss 14 15 dq4
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 2 functional block diagram truth table a0 vcc gnd a14 i/o0 i/o7 ce\ oe\ we\ 9a128-1 decoder i/o data circuit control circuit 256 x 1024 memory array column i/o mode oe\ ce\ we\ dq power standby x h x high-z standby read l l h q active read h l h high-z active write x l l d active
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 3 absolute maximum ratings* voltage on any input or dq relative to vss..................................................................-0.5v to vcc +0.5v voltage on vcc supply relative to vss.......................-1v to +7v storage temperature..............................................-65 o c to +150 o c power dissipation.......................................................................1w short circuit output current.................................................50ma lead temperature (soldering 10 seconds)........................+260 o c max. junction temperature.................................................+175 o c *stresses greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. electrical characteristics and recommended dc operating conditions (-55 o c < t c < 125 o c or -40 o c to +85 o c; v cc = 5.0v +10%) capacitance description conditions symbol min max units notes input high (logic 1) voltage v ih 2.2 vcc+0.5 v 1 input low (logic 0) voltage v il -0.5 0.8 v 1, 2 input leakage current 0v v in vcc il i -5 5 m a output leakage current output(s) disabled 0v < v out < vcc il o -5 5 m a output high voltage i oh = -4.0ma v oh 2.4 v 1 output low voltage i ol = 8.0ma v ol 0.4 v 1

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! " # $"#"% & '() *+,*+ , parameter conditions sym max units notes input capacitance c in 8pf4 input/output capacitance c io 10 pf 4 t a = 25 o c, f = 1mhz vcc = 5v
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 4 electrical characteristics and recommended ac operating conditions (note 5) (-55 o c < t c < 125 o c or -40 o c to +85 o c; v cc = 5.0v +10%) sym min max min max min max min max min max min max units notes read cycle time t rc 12 15 20 25 35 45 ns address access time t aa 12 15 20 25 35 45 ns chip enable access time t ace 12 15 20 25 35 45 ns output hold from address change t oh 222222ns chip enable to output in low-z t lzce 222222ns7 chip disable to output in high-z t hzce 7 8 9 10 14 15 ns 6,7 chip enable to power-up time t pu 000000ns4 chip disable to power-down time t pd 12 15 20 25 35 45 ns 4 output enable access time t aoe 678101415ns output enable to output in low-z t lzoe 000000ns output disable to output in high-z t hzoe 6 7 8 10 14 15 ns 6 write cycle time t wc 12 15 20 25 35 45 ns chip enable to end of write t cw 9 10 12 15 17 22 ns address valid to end of write t aw 9 10 12 15 17 22 ns address setup time t as 000000ns address hold from end of write t ah 0 0 0 0 0 0 ns write pulse width t wp 10 12 15 17 20 25 ns data setup time t ds 7 8 10 12 15 20 ns data hold time t dh 000000ns write disable to output in low-z t lzwe 222222ns7 write enable to output in high-z t hzwe 0 7 0 7 0 9 0 10 0 13 0 14 ns 6,7 write cycle -35 -45 description read cycle -15 -20 -25 -12
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 5 notes 1. all voltages referenced to v ss (gnd). 2. -3v for pulse width < 20ns 3. i cc is dependent on output loading and cycle rates. the specified value applies with the outputs unloaded, and f = 1 hz. t rc (min) 4. this parameter is guaranteed but not tested. 5. test conditions as specified with the output loading as shown in fig. 1 unless otherwise noted. 6. t hzce, t hzoe and t hzwe are specified with cl = 5pf as in fig. 2. transition is measured 500mv typical from steady state voltage, allowing for actual tester rc time constant. 7. at any given temperature and voltage condition, t hzce is less than t lzce, and t hzwe is less than t lzwe. 8. we\ is high for read cycle. 9. device is continuously selected. chip enables and output enables are held in their active state. 10. address valid prior to, or coincident with, latest occurring chip enable. 11. t rc = read cycle time. 12. chip enable (ce\) and write enable (we\) can initiate and terminate a write cycle. data retention electrical characteristics (l version only) low vcc data retention waveform 123 1 2 3 1 2 3 123 1 23 4 1 23 4 1 23 4 1234 dont care undefined ac test conditions input pulse levels....................................................vss to 3v input rise and fall times.....................................................5ns input timing reference level.............................................1.5v output reference level......................................................1.5v output load.................................................see figures 1 & 2 description symbol min max units notes v cc for retention data v dr 2--v v cc = 2v i ccdr 1.0 ma v cc = 3v 2.0 ma chip deselect to data retention time t cdr 0 -- ns 4 operation recovery time t r t rc ns 4, 11 data retention current ce\ > (v cc - 0.2v) v in > (v cc - 0.2v) or < 0.2v conditions 12345678 12345678 12345678 12345678 12345678 123 1 2 3 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 12345678 12345678 12345678 12345678 12345678 12 12 12 12 12 123 1 2 3 1 2 3 123 data retention mode v dr > 2v 4.5v 4.5v v dr t cdr t r v ih v il v cc ce\ fig. 2 output load equivalent fig. 1 output load equivalent +5v q 255 30 pf 480 5 pf +5v q 255 480
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 6 taa toh trc trc previous data valid valid data valid address dq tpd tpu thzce tace tlzce thzoe tlzoe taoe trc trc data valid ce\ oe\ dq icc read cycle no. 1 8, 9 read cycle no. 2 7, 8, 10, 12
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 7 write cycle no. 1 12 (chip enabled controlled) write cycle no. 2 7, 12 (write enabled controlled) tdh tds twp1 twp1 tah tcw taw tcw tas twc twc high z data vaild address ce\ we\ d q tdh twp1 twp1 tas taw tcw tah tcw twc twc data valid address ce\ we\ d q high-z note: output enable (oe\) is inactive (high).
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 8 mechanical definitions* asi case #108 (package designator c) smd 5962-88662, case outline n note: these dimensions are per the smd. asi's package dimensional limits may differ, but they will be within the smd limits. * all measurements are in inches. s2 a q l e b b2 s1 d e min max a --- 0.225 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d --- 1.485 e 0.240 0.310 ea e l 0.125 0.200 q 0.015 0.070 s1 0.005 --- s2 0.005 --- symbol 0.100 bsc smd specifications 0.300 bsc ea c
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 9 * all measurements are in inches. mechanical definitions* asi case #110 (package designator cw) smd 5962-88662, case outline x note: these dimensions are per the smd. asi's package dimensional limits may differ, but they will be within the smd limits. s2 a q l e b b2 s1 d e min max a --- 0.232 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d --- 1.490 e 0.500 0.610 ea e l 0.125 0.200 q 0.015 0.060 s1 0.005 --- s2 0.005 --- symbol 0.100 bsc smd specifications 0.600 bsc ea c
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 10 * all measurements are in inches. mechanical definitions* asi case #204 (package designator ec) smd 5962-88662, case outline u note: these dimensions are per the smd. asi's package dimensional limits may differ, but they will be within the smd limits. e d e3 hx45 o a a1 d3 min max a 0.060 0.120 a1 0.050 0.088 b1 0.022 0.028 b2 d 0.342 0.358 d1 d2 d3 --- 0.358 e 0.540 0.560 e1 e2 e3 --- 0.558 e h l 0.045 0.055 l1 0.075 0.095 symbol smd specifications 0.072 ref 0.200 bsc 0.100 bsc 0.040 ref 0.050 bsc 0.200 bsc 0.400 bsc e1 l1 b1 d1 l e b2 e2 d2
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 11 * all measurements are in inches. e d e3 hx45 o a a1 d3 e1 l1 b1 d1 l e b2 e2 d2 min max a 0.060 0.120 a1 0.050 0.088 b1 0.022 0.028 b2 d 0.442 0.458 d1 d2 d3 --- 0.458 e 0.540 0.560 e1 e2 e3 --- 0.558 e h l 0.045 0.055 l1 0.075 0.095 0.150 bsc 0.040 ref 0.050 bsc 0.200 bsc 0.400 bsc symbol smd specifications 0.072 ref 0.300 bsc mechanical definitions* asi case #208 (package designator ecw) smd 5962-88662, case outline y note: these dimensions are per the smd. asi's package dimensional limits may differ, but they will be within the smd limits.
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 12 * all measurements are in inches. mechanical definitions* asi case #302 (package designator f) smd 5962-88662, case outline t l c e2 a q e3 e min max a 0.090 0.130 b 0.015 0.019 c 0.004 0.009 d --- 0.740 e 0.380 0.420 e2 0.180 --- e3 0.030 --- e l 0.250 0.370 q 0.026 0.045 s 0.000 0.045 symbol smd specifications 0.050 bsc note: these dimensions are per the smd. asi's package dimensional limits may differ, but they will be within the smd limits. d e b top view s
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 13 * all measurements are in inches. asi case #500 (package designator ecj) mechanical definitions* a a2 e b d e d1 e1 e2 b1

sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 14 ordering information *available processes it = industrial temperature range -40 o c to +85 o c xt = extended temperature range -55 o c to +125 o c 883c = full military processing -55 o c to +125 o c 12ns & 15ns offered in it only **definition of options 2v data retention / low power l device number options** package type speed ns process device number options** package type speed ns process mt5c2568 mt5c2568 l l c cw -12 -12 /* /* mt5c2568 mt5c2568 l l ec ecw -12 -12 /* /* mt5c2568 mt5c2568 l l c cw -15 -15 /* /* mt5c2568 mt5c2568 l l ec ecw -15 -15 /* /* mt5c2568 mt5c2568 l l c cw -20 -20 /* /* mt5c2568 mt5c2568 l l ec ecw -20 -20 /* /* mt5c2568 mt5c2568 l l c cw -25 -25 /* /* mt5c2568 mt5c2568 l l ec ecw -25 -25 /* /* mt5c2568 mt5c2568 l l c cw -35 -35 /* /* mt5c2568 mt5c2568 l l ec ecw -35 -35 /* /* mt5c2568 mt5c2568 l l c cw -45 -45 /* /* mt5c2568 mt5c2568 l l ec ecw -45 -45 /* /* mt5c2568 mt5c2568 l l c cw -55 -55 /* /* mt5c2568 mt5c2568 l l ec ecw -55 -55 /* /* mt5c2568 mt5c2568 l l c cw -70 -70 /* /* mt5c2568 mt5c2568 l l ec ecw -70 -70 /* /* mt5c2568 l cw -100 /* mt5c2568 l ecw -100 /* device number options** package type speed ns process device number options** package type speed ns process mt5c2568 l f -12 /* mt5c2568 l ecj -12 /* /* mt5c2568 l f -15 /* mt5c2568 l ecj -15 /* /* mt5c2568 l f -20 /* mt5c2568 l ecj -20 /* /* mt5c2568 l f -25 /* mt5c2568 l ecj -25 /* /* mt5c2568 l f -35 /* mt5c2568 l ecj -35 /* /* mt5c2568 l f -45 /* mt5c2568 l ecj -45 /* /* mt5c2568 l f -55 /* mt5c2568 l ecj -55 /* /* mt5c2568 l f -70 /* mt5c2568 l ecj -70 /* /* mt5c2568 l f -100 /* example: mt5c2568l cw-25/xt example: mt5c2568f-55/xt example: mt5c2568l ecw-15/it example: mt5c2568l ecj-70/it
sram mt5c2568 austin semiconductor, inc. mt5c2568 rev. 1.0 9/99 austin semiconductor, inc. reserves the right to change products or specifications without notice. 15 * asi part number is for reference only. orders received referencing the smd part number will be processed per the smd. asi to dscc part number cross reference* asi package designator c & cw asi part # smd part # mt5c2568c-20/883c 5962-8866207nx mt5c2568c-25/883c 5962-8866206nx mt5c2568c-35/883c 5962-8866205nx mt5c2568c-45/883c 5962-8866204nx mt5c2568c-55/883c 5962-8866203nx mt5c2568c-70/883c 5962-8866202nx mt5c2568cw-20/883c 5962-8866207xx mt5c2568cw-25/883c 5962-8866206xx mt5c2568cw-35/883c 5962-8866205xx mt5c2568cw-45/883c 5962-8866204xx mt5c2568cw-55/883c 5962-8866203xx mt5c2568cw-70/883c 5962-8866202xx mt5c2568cw-100/883c 5962-8866201xx asi package designator ec & ecw asi part # smd part # mt5c2568ec-20/883c 5962-8866207ux mt5c2568ec-25/883c 5962-8866206ux mt5c2568ec-35/883c 5962-8866205ux mt5c2568ec-45/883c 5962-8866204ux mt5c2568ec-55/883c 5962-8866203ux mt5c2568ec-70/883c 5962-8866202ux mt5c2568ecw-20/883c 5962-8866207yx mt5c2568ecw-25/883c 5962-8866206yx mt5c2568ecw-35/883c 5962-8866205yx mt5c2568ecw-45/883c 5962-8866204yx mt5c2568ecw-55/883c 5962-8866203yx mt5c2568ecw-70/883c 5962-8866202yx mt5c2568ecw-100/883c 5962-8866201yx asi package designator f asi part # smd part # mt5c2568f-20/883c 5962-8866207tx mt5c2568f-25/883c 5962-8866206tx mt5c2568f-35/883c 5962-8866205tx mt5c2568f-45/883c 5962-8866204tx mt5c2568f-55/883c 5962-8866203tx mt5c2568f-70/883c 5962-8866202tx mt5c2568f-100/883c 5962-8866201tx

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